RT8800/B
General Purpose 2/3-Phase PWM Controller for High-DensityPower Supply
General Description
The RT8800/B are general purpose multi-phasesynchronous buck controllers dedicating for high densitypower supply regulation. The parts implement 2, and 3buck switching stages operating in interleaved phase setautomatically. The output voltage is regulated andcontrolled following the input voltage of FB pin. With sucha single analog control, the RT8800/B provide a simple,flexible, wide-range and extreme cost-effective high-density voltage regulation solutions for various high-densitypower supply application. The RT8800/B multi-phasearchitecture provide high output current while maintaininglow power dissipation on power devices and low stresson input and output capacitors. The high equivalentoperating frequency also reduces the componentdimension and the output voltage ripple in load transient.RT8800/B implement both voltage and current loops toachieve good regulation, response and power stagethermal balance. The RT8800/B apply the time sharingDCR current sensing technology newly as well; with sucha topology, the RT8800/B extract the DCR of outputinductor as sense component to deliver a more preciseload line regulation and better thermal balance capability.Moreover, the parts monitor the output voltage for over-current and over-voltage protection; Soft-start andprogrammable under-voltage lockout are also provided toassure the safety of power system.
Features
5V Power Supply Voltage
2/3-Phase Power Conversion with Automatic PhaseSelection (RT8800 : 2/3-Phase, RT8800B : 2-Phase)Output Voltage Controlled by External ReferenceVoltage
Precise Core Voltage Regulation
Power Stage Thermal Balance by DCR CurrentSensing
Extreme Low-Cost, Lossless Time Sharing CurrentSensing
Internal Soft-start
Hiccup Mode Over-Current ProtectionOver-Voltage Protection
Adjustable Operating Frequency and Typical at300kHz Per Phase
Power Good indication
Small 16-Lead VQFN Package (For RT8800 only)RoHS Compliant and 100% Lead (Pb)-Free
Ordering Information
RT8800/BPackage TypeQV : VQFN-16L 3x3 (V-Type)S : SOP-16Operating Temperature RangeP : Pb Free with Commercial StandardG : Green (Halogen Free with Commer- cial Standard)2-Phase2/3-PhaseApplications
Desktop CPU core power
Low Output Voltage, High power density DC-DCConverters
Voltage Regulator Modules
Note :
RichTek Pb-free and Green products are :
Marking Information
For marking information, contact our sales representativedirectly or through a RichTek distributor located in yourarea, otherwise visit our website for detail.
`RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020.
`Suitable for use in SnPb or Pb-free soldering processes.`100% matte tin (Sn) plating.
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RT8800/B
Pin Configurations
(TOP VIEW)
PWM3PWM2PWM1VDD16151413DACFB1DACQ2FB3DVD4512ISP1
GND11ISP210ISP39PGOOD
678COMPICOMMONVDDDACFBDACQ
FBDVDCOMP
PIRT
2345678161514131211109PWM2PWM1N/CISP1ISP2PGOODGND
ICOMMON
PIRTSOP-16RT8800B
VQFN-16L 3x3RT8800
Functional Pin Description
DACFB
Negative input of internal buffer amplifier for referencevoltage regulation. The pin voltage is locked at internalVREF = 0.8V by properly close the buffer amplifier feedbackloop.DACQ
The pin is defined as the output of internal buffer amplifierfor reference voltage regulation.FB
The pin is defined as the inverting input of internal erroramplifier.DVD
The pin is defined as a programmable power UVLOdetection input. Trip threshold = 0.8V at VDVD rising.COMP
The pin is defined as the output of the error amplifier andthe input of all PWM comparators.PI
The pin is defined as the positive input of the error amplifier.RT
Switching frequency setting. Connect this pin to GND witha resistor to set the frequency.
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ICOMMON
Common negative input of current sense amplifiers for allthree channels.PGOOD
Output power-good indication. The signal is implementedas an output signal with open-drain type.ISP1 , ISP2 , ISP3
Current sense positive inputs for individual converterchannel current sense.PWM1 , PWM2 , PWM3
PWM outputs for each phase switching drive.VDD
Chip power supply. Connect this pin to a 5V supply.GND
Chip power ground.Exposed Pad (RT8800)
Exposed pad should be soldered to PCB board andconnected to GND.
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Typical Application Circuit
DS8800/B-06 March 2007
D1SS12/SM12VC71uFR20105VC91uFC121uFC112200uFQ1L20.5uHQ2R252.2PHASE1C143.3nFL1C131uH1000uF12VC133pFOptional forR & C14VDDPVCCUGATE1PHASE14Q3PHB95N03LT11BOOT11213R220PHB83N03LTR2R160C3C4C81uF51PWM1RT9602LGATE12PWM2UGATE23GNDPHASE2LGATE27PHB83N03LTR210R115kC210nFR33kVCORE61FB4VDD15PWM1COMPVID5R4110k(Note : The inductor’s DCR value must be large than 0.3mΩ
VID0R556kRDROOPPWM298Q4R2307GND10ISP26PGNDR18PHASE2RR19PHASE1RC61uFVCORED2SS12/SMPI16R170VID1R627kVID2R713kR111.8k3DACQ2DACFB12RT8800BC152200uFC161uFVID3R86.8k11ISP1ICOMMONVID4R93.3kR1210kPGOODC18 to C291000uF x 12PHASE2L30.5uHR262.2C30 to C3310uF x 4DVD5RT8R105.1k3.3V13OptionalC51uFOptional430RICOMMON19Figure A. 2-phase with resistive DAC
BOOT210C101uFR240PHB95N03LT12VR1516kQ5Q6 : X7R/R-type capacitor is required for all time constant setting capacitor of DCR sensing.)
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C173.3nFR1327kR143kOptionalRICOMMON2RT8800/B
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PVCC2PHASE2LGATE216BOOT2RT9605PVCC3GNDPHASE3151112VPWM3PWM2PWM1BOOT1LGATE3715R16PHASE3RUGATE2R115kC310nFR33kNCPHASE1PVCC1LGATE1ICOMMONDVD4RT7Figure B. 3-phase with resistive DAC
C15R18012V1uFR2005VC44.7uFC10 to C131500uF x 4C141uFR105.1k3.3V12R13R1516kOptional430OptionalC71uFVCORERICOMMON1R12VVINR17PHASE1D2Q4C61uFRC171uFR21027kOptionalR17PHASE21UGATE1242212V23C181uF12V8R2310R220C191uFVDDwww.richtek.com4
PHASE2L10.5uH12VVINQ3Q1D1Q21uHC81000uFC91uFR192.2C163.3uFC24 to C351000uF x 12RT8800/B
C133pFOptionalC2R2171921203Q7PHASE3C233.3nFQ8C211uFR272.2R260R25140C36 to C3910uF x 4165FB3VDD13PWM1COMPVID5R4110kRDROOPVID0R556k6RT8800GNDISP32ISP2C51uFPIPWM3PWM21011Optional14R6VID127k2DACQL20.5uHVCOREQ9VID2R713kR111.8k1DACFBUGATE310BOOT39C221uFD3VID3R86.8k9ISP1PGOODVID4R93.3kR1210k12VVIN85VSBPHASE1L30.5uHQ5R242.2C203.3nFQ6All brand name or trademark belong to their owner respectively
R143kRICOMMON2DS8800/B-06 March 2007
PHASE2L10.5uH12VVINQ3Q1Q2C17R13012V1uFR150C25 to C361000uF x 12D1C11 to C141500uF x 4C151uF1uHC91000uFC101uF5VC.7uFR142.2C163.3uF元器件交易网www.cecb2b.com
PVCC2UGATE2PHASE2LGATE2NCPHASE1PVCC1LGATE1ICOMMONDVD4RT73.3V12VR83kOptional430RICOMMON1C81uFVCORE12VVINRQ4R12PHASE1D2R916kC71uFRC181uFR160R727k12VOptionalR11PHASE21UGATE1242223C191uF8R1910R180C201uFVDDDS8800/B-06 March 2007
171921203Q7PHASE3C243.3nFQ8R222.2R210L20.5uHVCOREQ9C133pFOptionalC3R2R115kC210nFR33k16516BOOT2RT9605PVCC3GNDPHASE3UGATE310BOOT39C231uF3LGATE3151112VFB7155PWM2PWM1BOOT14R10OptionalPHASE3RC61uFR20140C221uFC37 to C4010uF x 4VDD13PWM1COMPRDROOP6RT8800GNDISP32ISP2ISP11110PWM214PWM3PIPWM3C410nF2DACQR45.1k1DACFBR55.1k9PGOODR610k12VVIN1285VSBPHASE1L30.5uHQ5R172.2C213.3nFQ6RT9401A/BFigure C. 3-phase with RT9401A/B DAC generator
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1VID2VID382VID1VID47OptionalRICOMMON23VDAGND6RT8800/B
5V4VDD VID05www.richtek.com
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++PWMCPINHPWM Logic& DriverPWM2Function Block Diagram
Soft Start+PWMCPINHPWM Logic& Driver-+++COMP+PWMCP--+++EAGM+-FBPIOVPOCPSample& HoldMAJSUM/N& OCPDetectionSample& HoldSample& HoldMuxMux500mV+-BufferAmplifier0.8VVREFDACQAll brand name or trademark belong to their owner respectively
GND+-++Power OnResetPWM1PWM3ICOMMONISP1ISP2ISP3www.richtek.com6
PGOODVDDDVDRTOscillator&Ramp GeneratorPWM Logic& DriverINHRT8800/B
DACFBDS8800/B-06 March 2007
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RT8800/B
Table. Output Voltage Program
VID5 VID4 VID3 VID2 VID1 VID0 Nominal Output Voltage (V) 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 0 1 1 1 1 0 1 0 1 1 1 0 1 1 1 1 1 0 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 1 0 1 1 1 1 1 0 1 0 0 1 1 0 1 0 1 1 1 0 0 1 0 1 1 0 0 1 1 1 1 0 0 0 0 1 1 0 0 0 1 1 0 1 1 1 0 1 0 1 1 1 1 1 0 1 1 0 0 1 0 1 1 0 1 1 0 1 0 1 0 1 0 1 0 1 1 1 0 1 0 0 0 1 0 1 0 0 1 1 0 0 1 1 0 1 0 0 1 1 1 1 0 0 1 0 0 1 0 0 1 0 1 1 0 0 0 1 0 1 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 0 0 0 1 1 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 0 1 1 0 0 1.0800 1.1000 1.1125 1.1250 1.1375 1.1500 1.1625 1.1750 1.1875 1.2000 1.2125 1.2250 1.2375 1.2500 1.2625 1.2750 1.2875 1.3000 1.3125 1.3250 1.3375 1.3500 1.3625 1.3750 1.3875 1.4000 1.4125 1.4250 1.4375 1.4500 1.4625 1.4750 1.4875 1.5000 1.5125 1.5250 1.5375 1.5500 To be continued
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RT8800/B
Table. Output Voltage Program
VID5 VID4 VID3 VID2 VID1 VID0 Nominal Output Voltage (V) 0 0 1 1 0 0 1 0 1 0 1 1 0 0 1 0 1 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 1 0 0 0 1 0 0 1 1 1 1 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 0 1 0 0 0 1 1 1 0 0 0 1 0 1 0 0 0 0 1 1 0 0 0 0 0 1.5625 1.5750 1.5875 1.6000 1.6250 1.6500 1.6750 1.7000 1.7250 1.7500 1.7750 1.8000 1.8250 1.8500 Note: 1 : Open
0 : VSS or GND
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RT8800/B
Absolute Maximum Ratings (Note 1)
Supply Voltage, VDD-------------------------------------------------------------------------------------------7V
Input, Output or I/O Voltage----------------------------------------------------------------------------------GND − 0.3V to VDD + 0.3VPower Dissipation, PD @ TA = 25°C
VQFN-16L 3X3--------------------------------------------------------------------------------------------------SOP-16-----------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 4)
VQFN-16L 3X3, θJA---------------------------------------------------------------------------------------------SOP-16, θJA-----------------------------------------------------------------------------------------------------Junction Temperature------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------Storage Temperature Range---------------------------------------------------------------------------------ESD Susceptibility (Note 2)
HBM (Human Body Mode)-----------------------------------------------------------------------------------MM (Machine Mode)-------------------------------------------------------------------------------------------1.47W1W
68°C/W100°C/W150°C260°C
−65°C to 150°C2kV200V
Recommended Operating Conditions (Note 3)
Supply Voltage, VDD-------------------------------------------------------------------------------------------5V ± 10%Ambient Temperature Range---------------------------------------------------------------------------------0°C to 70°CJunction Temperature Range---------------------------------------------------------------------------------0°C to 125°C
Electrical Characteristics
(VDD = 5V, TA = 25°C, unless otherwise specified)VDD Supply Current Nominal Supply Current Power-On Reset VDD Threshold Rising Hysteresis IDD PWM 1,2,3 Open -- 5 -- mA Parameter Symbol Test Conditions Min Typ Max Units 4.0 4.2 4.5 V 0.2 0.5 -- V 0.75 -- 0.8 65 0.85 -- V mV DVD Rising Threshold DVD Hysteresis Oscillator Free Running Frequency Frequency Adjustable Range Ramp Amplitude Ramp Valley Maximum On-Time of Each Channel Minimum On-Time of Each Channel RT Pin Voltage fOSC fOSC_ADJ ΔVOSC VRV VRT RRT = 16kΩ RRT = 16kΩ RRT = 16kΩ 170 200 230 kHz 50 -- 400 kHz -- 1.7 -- V -- 1.0 -- V 62 -- 66 120 75 -- % ns 0.77 0.82 0.87 V To be continued
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RT8800/B
Reference Voltage Reference Voltage DACFB Sourcing Capability Error Amplifier DC Gain Gain-Bandwidth Product Slew Rate Current Sense GM Amplifier Recommended Full Scale Source Current OCP trip level Protection Over-Voltage Trip (VFB - VDACQ) Power Good PGOOD Output Low Voltage PGOOD Delay VPGOOD IPGOOD = 4mA -- 4 -- -- 0.2 8 V ms -- 500 -- mV -- 100 -- μA GBW SR CL = 10pF CL = 10pF -- -- -- 65 10 8 -- -- -- dB MHz V/μs VDACFB Parameter Symbol Test Conditions Min Typ Max Units 0.79 0.8 0.81 V -- -- 10 mA IOCP 160 190 220 μA TPGOOD_Delay 90% * VOUT to PGOOD_H Note 1. Stresses listed as the above \"Absolute Maximum Ratings\" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in theoperational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extendedperiods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. The device is not guaranteed to function outside its operating conditions.
Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
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RT8800/B
Typical Operating Characteristics
Load Line
1.41.38
Efficiency vs. Output Current
1009080
RLL = 1.5mΩ, RICOMMON2 = 10kΩ, RDROOP = 100ΩVIN = 12VVIN = 12V, VOUT = 1.4VOutput Voltage (V)1.361.341.321.31.281.261.24
0
10
20
30
40
50
60
70
80
90
100
Efficiency (%)7060504030201000
10
20
30
40
50
60
Driver RT960570
80
90
100
Output Current (A)Output Current (A)
Frequency vs. RRT
1000900800
GM
90807060
RICOMMON1 = 430ΩFrequency (kHz)700
IADJ (uA)60050040030020010000
5
1015202530
3045505560
504030201000
10
20
30
40
50
60
70
80
GM3GM2GM190100110
RRT (k(kٛΩ))
VC (mV)
VREF vs. Temperature
0.8150.810.805
OCP Trip Point vs. Temperature
240210180150
VREF(V)Ix (uA)-25
-10
5
20
35
50
65
80
95
110125
0.80.7950.790.7850.78
1209060300-25
-10
5
20
35
50
65
80
95
Temperature(°C)
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Temperature(°C)
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Frequency vs. Temperature
350300
Load Transient Response
VCORE(200mV/Div)Frequency (kHz)25020015010050
UGATE1(20V/Div)UGATE2(20V/Div)UGATE3(20V/Div)
RRT = 16kΩ0-25
-10
5
20
35
50
65
80
95
110125
phase 1, IOUT = 5A to 85A @SR = 93A/us)
Temperature(°C)
Time (2.5μs/Div)
Load Transient Response
VCORE(200mV/Div)VCORE(200mV/Div)Load Transient Response
UGATE1(20V/Div)UGATE2(20V/Div)UGATE3(20V/Div)
phase2, IOUT = 5A to 85A @SR = 93A/us)
UGATE1(20V/Div)UGATE2(20V/Div)UGATE3(20V/Div)
phase 3, IOUT = 5A to 85A @SR = 93A/us)
Time (2.5μs/Div)Time (2.5μs/Div)
Over Current Protection
Short While Turn_On
Over Current Protection
Short After Turn_On
IL1+IL2(50A/Div)
IL1+IL2(50A/Div)VCORE(1V/Div)PWM1(10V/Div)VCOMP(2V/Div)
Time (10ms/Div)
VCORE(1V/Div)PWM1(10V/Div)VCOMP(2V/Div)
Time (10ms/Div)
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RT8800/B
VID On the Fly Falling
IOUT = 5A
VID On the Fly Falling
VCORE(50mV/Div)PWM(5V/Div)VFB
(200mV/Div)
IOUT = 90A
PWM(5V/Div)VCORE(100mV/Div)VFB
(200mV/Div)
VID0(2V/Div)
Time (25μs/Div)
VID0(2V/Div)
Time (25μs/Div)
VID On the Fly Rising
IOUT = 5A
VID On the Fly Rising
IOUT = 90A
PWM(5V/Div)
PWM(5V/Div)
VCORE(200mV/Div)VFB
(200mV/Div)VID0(2V/Div)
Time (10μs/Div)
VCORE(200mV/Div)VFB
(200mV/Div)VID0(2V/Div)
Time (10μs/Div)
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RT8800/B
Application Information
RT8800/B are multiphase DC/DC controllers for extremelow cost applications that precisely regulate CPU corevoltage and balance the current of different power channelsusing time sharing current sensing method. The converterconsisting of RT8800/B and its companion MOSFET driverRT96xx series provide high quality CPU power and allprotection functions to meet the requirement of modernVRM.
Phase Setting and Converter Start Up
RT8800/B interface with companion MOSFET drivers (likeRT9602, RT9603, and RT9605) for correct converterinitialization. RT8800/B will sense the voltage on PWMpins at the instant of POR rising. If the voltage is smallerthan (VDD − 1.2V) the related channel is activated. Tie thePWM to VDD and the corresponding current sense pins toGND or left float if the channel is unused. For example, for2-Channel application, tie PWM3 to VDD and ISP3 to GND(or let ISP3 open).
PGOOD Function and Soft Start
To indicate the condition of multiphase converter,RT8800/B provide PGOOD signal through an open drainconnection. The output becomes high impedance afterinternal SS ramp > 3.5V.
duty width according to its magnitude above the rampsignal. The output follows the ramp signal, SS. Howeverwhile VOUT increases, the difference between VOUT andSSE(SS − VGS) is reduced and COMP leaves thesaturation and declines. The takeover of SS lasts until itmeets the COMP. During this interval, since the feedbackpath is broken, the converter is operated in the open loop.3) Mode3 ( Cross-over< SS < VGS + VREF)
When the Comp takes over the non-inverting input for PWMAmplifier and when SSE (SS − VGS) < VREF, the output ofthe converter follows the ramp input, SSE (SS − VGS).Before the crossover, the output follows SS signal. Andwhen Comp takes over SS, the output is expected to followSSE (SS − VGS). Therefore the deviation of VGS isrepresented as the falling of VOUT for a short while. TheCOMP is observed to keep its decline when it passes thecross-over, which shortens the duty width and hence thefalling of VOUT happens.
Since there is a feedback loop for the error amplifier, theoutput’s response to the ramp input, SSE (SS − VGS) islower than that in Mode 2.4) Mode 4 (SS > VGS + VREF)
When SS > VGS + VREF, the output of the converter followsthe desired VREF signal and the soft start is completednow.
Voltage Control
COMPVRAMP_ValleyCross-overSS_InternalVCORESSE_Internal1) Mode 1 (SS< Vramp_valley)
Initially the COMP stays in the positive saturation. WhenSS< VRAMP_Valley, there is no non-inverting input availableto produce duty width. So there is no PWM signal andVOUT is zero.
2) Mode 2 (VRAMP_Valley< SS< Cross-over)
When SS>VRAMP_Valley, SS takes over the non-invertinginput and produce the PWM signal and the increasing
The voltage control loop consists of error amplifier,multiphase pulse width modulator, driver and powercomponents. As conventional voltage mode PWMcontroller, the output voltage is locked at the positive inputof error amplifier and the error signal is used as the controlsignal of pulse width modulator. The PWM signals ofdifferent channels are generated by comparison of EAoutput and split-phase sawtooth wave. Power stagetransforms VIN to output by PWM signal on-time ratio.Output Voltage Program
The output voltage of a RT8800/B converter is programmedto discrete levels between 1.08V and 1.85V. The voltageidentification (VID) pins program an external voltagereference (DACQ) with a 6-bit digital-to-analog converter(DAC). The level of DACQ also sets the OVP threshold.The output voltage should not be adjusted while theconverter is delivering power. Remove input power before
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RT8800/B
changing the output voltage. Adjusting the output voltageduring operation may trigger the over-voltage protection.The DAC function is a precision non-inverting summationamplifier shown in Figure 1. The resistor values shownare only approximations of the actual precision valuesused. Grounding any combination of the VID pins increasesthe DACQ voltage. The “open” circuit voltage on the VIDpins is the band gap reference voltage (VREF = 0.8V).
VCORE vs. Temperature
1.381.3751.37
CPU : P4-2.8GVCORE = 1.35VR = 1/3VCORE (V)1.3651.361.3551.351.345
R = 1/9VID0VID1VID2VID3VID4VID5RRRRRRVREF(0.8V)VDACFB1.34
The Original R+OP-RFVDACQ
1.335
30
35
40
45
50
55
60
65
70
Temperature(°C)
Figure 3
RG1.66
VCORE vs. Temperature
1.1.62
Figure 1. The Structure of Discrete DAC GeneratorDAC Design Guideline
In high temperature environment, VCORE becomesunstable for the leakage current in VID pins is increasing.The leakage will increase current consumption of CPU,and then raise RT8800's VDACQ reference output, so doesVCORE voltage. Below are four comparison charts fordifferent CPUs.
Note: In Below Figure 2 to Figure 5, The Original R means
the resister values shown in typical application circuit.R=1/3 and R=1/9 mean that The Original R is dividedby 3 or 9.
CPU : Celeron 2.0GVCORE = 1.55VThe Original RVCORE (V)1.61.581.561.1.52
30
35
40
45
50
55
60
65
70
R = 1/3R = 1/9Temperature(°C)
Figure 4
VCORE vs. Temperature
1.681.661.
VCORE vs. Temperature
1.1.63
CPU : P4-3.06GVCORE = 1.55VThe Original RCPU : P4-3.2GVCORE = 1.55VThe Original R1.621.61
VCORE (V)VCORE (V)1.621.61.581.561.
30
35
40
45
50
55
60
65
70
1.61.591.581.57
R = 1/3R = 1/3R = 1/91.561.551.
30
35
40
45
50
55
60
R = 1/96570
Temperature(°C)
Temperature(°C)
Figure 2
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Figure 5
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RT8800/B
In order to maintain the VDACQ within 1% tolerance in theworst case, the total driver current of the DAC regulatorshould support up to 40mA. As the design of RT8800/B,the maximum driving current of the internal OP is 10mA.As shown in Figure 6, we suggest to add an externaltransistor 2N3904 for higher current for VDAC regulation.
VCCfor switching, period = TS
VIN - VO⎡⎤
SV) x TO - (⎢⎥DCRVIN
IX(S/H) = ⎢IL(AVG) - ⎥ x
2L⎢⎥RICOMMON1
⎢⎥⎣⎦
Falling Slope = Vo/L
ILIL(AVG)
VID0VID1VID2VID3VID4VID51.34k5310162812.63kVREF(0.8V)VDACFB+OP-43VDACQQ12N3904PI
Inductor CurrentIL(S/H)121PWM Signal & High Side MOSFET Gate SignalFigure 6. Immune circuit against CPU Leakage CurrentCurrent Sensing Setting
RT8800/B senses the current flowing through inductorvia its DCR for channel current balance and droop tuning.The differential sensing GM amplifier converts thevoltage on the sense component (can be a senseresistor or the DCR of the inductor) to current signalinto internal circuit (see Figure 7).
Low Side MOSFET Gate Signal
Figure 8. Inductor current and PWM signal
Figure 9 is the test circuit for GM. We apply test signal atGM inputs and observe its signal process output by PIpin sinking current. Figure 10 shows the variation of signalprocessing of all channels. We observe zero offsets andgood linearity between phases.
LVC
=R×C VC=DCR×IL IX=DCRRICOMMON1
LILR+-DCRC+V-CLDCRCESR+V-CVISPX+VICOMMON-RICOMMON1GMx1kIx
GMxIx
RICOMMONFigure 7. Current Sense Circuit
IL x DCRIX=The sensing circuit gets by localRICOMMON1
feedback.
IX is sampled and held just before low side MOSFET turnsoff (Figure 8).
IX(S/H) =
IL(S/H) x DCRVOTOFF
; IL(S/H) = IL(AVG) - x RICOMMON1L2VIN - VO
TOFF = () x TS
VIN
Figure 9. The Test Circuit of GM
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RT8800/B
706050
GM
GM3IADJ (uA)GM24030201000
20
40
60
80
100
For some case with preferable current ratio instead ofcurrent balance, the corresponding technique is provided.Due to different physical environment of each channel, itis necessary to slightly adjust current loading betweenchannels. Figure 12. shows the application circuit of GMfor current ratio requirement. Applying KVL along L+DCRbranch and R1+C//R2 branch:
L
dILdVC⎞⎛VC
+ DCR x IL = R1 ⎜ + C⎟ + VCdtR2dt⎝⎠
GM1dVCR1+R2
+ VCdtR2R2
For VC = DCR x IL
R1 + R2= R1 x C
VC (mV)
Look for its corresponding conditions:
L
dILdIL
+ DCR x IL + DCR x IL = (R1//R2) x C x DCR x
dtdt
LLet = (R1//R2) x C
DCRThus if
L
= (R1//R2) x CDCR
R2
Then VC = x DCR x IL
R1 +R2
Figure 10. The Linearity of GMx
Figure 11 shows the time sharing technique of GMamplifier. We apply test signal at phase 3 and observe thewaveforms at both pins of GM amplifier. The waveformsshow time sharing mechanism and the perfomance of GMto hold both input pins equal when the shared time is on.
Time Sharing of GM
CH1:(2V/Div)CH2:(50mV/Div)CH3:(50mV/Div)
With internal current balance function, this phase wouldshare (R1+R2)/R2 times current than other phases.Figure 13 &14 show different settings for the power stages.
ILPWM3
VISP3
1.5uH1mVISP3andVICOMMON
VICOMMON
3k1uF3kTime (1μs/Div)
Figure 13. GM3 Setting for current ratio function
Figure 11
Current Ratio Setting
ILLDCRCR1+V-CR21.5k1uFIL1.5uH1mFigure 14. GM1,2 Setting for current ratio function
Figure 12. Application circuit for current ratio setting
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RT8800/B
LDCRCESRVISPX+V-CLoad Line without dead zone at light loads
1.311.31.29
VCORE (V)GMxIx+VICOMMON-RICOMMON1RICOMMON21.281.271.261.25
RICOMMOM2 openRICOMMON2 = 82kFigure 15. Application circuit of GM
For load line design, with application circuit in Figure 15,it can eliminate the dead zone of load line at light loads. VISPX = VOUT +IL x DCR
if GM holds input voltages equal, then VISPX = VICOMMON
IX=
VICOMMONI×DCR
+L
RICOMMON2RICOMMON1
1.241.23
0
5
10
15
20
25
IOUT (A)
Figure 16
Current Balance
RT8800/B senses the inductor current via inductor’s DCRfor channel current balance and droop tuning. Thedifferential sensing GM amplifier converts the voltage onthe sense component (can be a sense resistor or theDCR of the inductor) to current signal into internal balancecircuit.
The current balance circuit sums and averages the currentsignals and then produces the balancing signals injectedto pulse width modulator. If the current of some powerchannel is larger than average, the balancing signalreduces that channels pulse width to keep current balance.The use of single GM amplifier via time sharing techniqueto sense all inductor currents can reduce the offset errorsand linearity variation between GMs. Thus it can greatlyimprove signal processing especially when dealing withsuch small signal as voltage drop across DCR.Voltage Reference for Converter Output & Load DroopThe positive input of error amplifier is PI pin that sinkscurrent proportional to the sum of converter output current.VDRP = 2ISINK x RDRP. The load droop proportional to loadcurrent can be set by the resistor between PI pin & externalVDACQ produced by either buffer amplifier or other voltagesource. The PI pin voltage should be larger than 0.8V forgood droop circuit performance.
=
VOUT+IL×DCRI×DCR
+L
RICOMMON2RICOMMON1
VOUTRICOMMON2
+
IL×DCRRICOMMON2
+
IL×DCR
RICOMMON1
=
For the lack of sinking capability of GM, RICOMMON2 shouldbe small enough to compensate the negative inductorvalley current especially at light loads.
VICOMMONI×DCR
≥L
RICOMMON2RICOMMON1
Assume the negative inductor valley current is −5A at noload, then for
RICOMMON1 = 330Ω, RADJ = 160Ω, VOUT = 1.300
1.3VRICOMMON2
≥
-5A×1mΩ330Ω
RICOMMON2 ≤ 85.8kΩChoose RICOMMON2 = 82kΩ
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RT8800/B
FBVDACQPI+VDRP--EA+ISINK2xIX12xIX22xIX3Over Current Protection
CH1:(5V/Div)CH2:(5V/Div)
PWM
Figure 17. Load Droop Circuit
DAC Offset Voltage Tuning
The Intel specification requires that at no load the nominaloutput voltage of the regulator be offset to a value lowerthan the nominal voltage corresponding to the VID code.The offset is tuning from RG in the DAC generator asFigure 18.
VID0VID1VID2VID3VID4VID5RRRRRRRGVREF(0.8V)VDACFBIL
Time (25ms/Div)
Figure 19. The Over Current Protection in the interval
+OP-RFVDACQ
Over Current Protection
CH1:(5V/Div)CH2:(5V/Div)
PWM
Figure 18. The Structure of Discrete DAC GeneratorIf VID0~6 is set at VSS (Ground), and to suppose thatshunt resistance is Rs.
From below equation, we can tune the value of RG toincrease or decrease the base voltage of VDACQ.
RFRF
VDACQ = (1 + ) x VREF + x VREF
RGRS
Over Current Protection
OCP comparator co\\mpares each inductor current sensed
& sample/hold by current sense circuit with this referencecurrent(150uA). RT8800/B uses hiccup mode to eliminatefault detection of OCP or reduce output current whenoutput is shorted to ground.
VSS
Time (25ms/Div)
Figure 20. Over Current Protection at steady state
Fault Detection
The “hiccup mode” operation of over current protectionis adopted to reduce the short circuit current. The in-rushcurrent at the start up is suppressed by the soft startcircuit through clamping the pulse width and output voltageby an internal slow rising ramp.
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RT8800/B
Design Procedure Suggestion
a.Output filter pole and zero (Inductor, output capacitorvalue & ESR).
b.Error amplifier compensation & sawtooth wave amp-litude (compensation network).Current Loop Setting
a.GM amplifier S/H current (current sense componentDCR, ICOMMON pin external resistor value).b.Over-current protection trip point (RICOMMON1 resistor).VRM Load Line Setting
a.Droop amplitude (PI pin resistor).b.No load offset (RICOMMON2)Power Sequence & SS
DVD pin external resistor and SS pin capacitor.PCB Layout
a.Sense for current sense GM amplifier input.b.Refer to layout guide for other items.Voltage Loop SettingDesign ExampleGiven:
Apply for four phase converterVIN = 12VVCORE = 1.5VILOAD(MAX) = 100A
VDROOP = 100mV at full load (1mΩ Load Line)OCP trip point set at 35A for each channel (S/H)DCR = 1mΩ of inductor at 25°CL = 1.5μH
COUT = 8000μF with 5mΩ equivalent ESR.1. Compensation Settinga. Modulator Gain, Pole and Zero:From the following formula:
Modulator Gain =VIN/VRAMP =12/2.4=5 (i.e 14dB)where VRAMP : ramp amplitude of saw-tooth wave
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RB14.7kLC Filter Pole = 1.45kHz andESR Zero =3.98kHzb. EA Compensation Network:
Select R1 = 4.7k, R2 = 15k, C1 = 12nF, C2 = 68pFand use the Type 2 compensation scheme shown inFigure 21. By calculation, the FZ = 0.88kHz,FP = 322kHz and Middle Band Gain is 3.19 (i.e10.07dB).
C2 68pFRB2C115k12nF-EA+Figure 21. Type 2 compensation network of EA2. Over-Current Protection Setting
Consider the temperature coefficient of copper3900ppm/°C,
IL×DCR
=150μA
RICOMMON1
IL×1.39mΩ
=150μA
330ΩIL=35.6A
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RT8800/B
Layout Guide
Place the high-power switching components first, and separate them from sensitive nodes.1. Most critical path:
The current sense circuit is the most sensitive part of the converter. The current sense resistors tied to ISP1,2,3 andICOMMON should be located not more than 0.5 inch from the IC and away from the noise switching nodes. The PCBtrace of sense nodes should be parallel and as short as possible. R&C filter of choke should place close to PWM andthe R & C connect directly to the pin of each output choke, use 10 mil differencial pair, and 20 mil gap to other phasepair. Less via as possible.2. Switching ripple current path:
a. Input capacitor to high side MOSFET.b. Low side MOSFET to output capacitor.c. The return path of input and output capacitor.d. Separate the power and signal GND.
e. The switching nodes (the connection node of high/low side MOSFET and inductor) is the most noisy points.Keepthem away from sensitive small-signal node.f . Reduce parasitic R, L by minimum length, enough copper thickness and avoiding of via.3. MOSFET driver should be closed to MOSFET.
SW1L1VINRINVOUTVCINL2COUTRL
SW2Figure 22. Power Stage Ripple Current Path
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RT8800/B
Next to IC+12V0.1uFVCCBSTDRVHINSWCBOOTLO1CIN+12V or +5VPWMRTGNDVCCCBP+5VIN
Next to ICVCORECOUTRICOMCOMPCCRCFBRFBLocate nextto FB PinRT8800/BICOMMONRT9603DRVLGNDLocate near MOSFETsCSPxGNDPIRDRDFigure 23. Layout Consideration
Figure 24
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Figure 25
Figure 26
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RT8800/B
Figure 27All brand name or trademark belong to their owner respectively
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RT8800/BOutline DimensionDD2SEE DETAIL AL1EE2112eAA1A3b2DETAIL APin #1 ID and Tie Bar Mark OptionsNote : The configuration of the Pin #1 identifier is optional,but must be located within the zone indicated.Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 D 2.950 3.050 0.116 0.120 D2 1.300 1.750 0.051 0.069 E 2.950 3.050 0.116 0.120 E2 1.300 1.750 0.051 0.069 e 0.500 0.020 L 0.350 0.450 0.014 0.018
V-Type 16L QFN 3x3 Package
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RT8800/B
AHM
JBFCIDSymbol A B C D F H I J M Dimensions In Millimeters Dimensions In Inches Min Max Min Max 9.804 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 10.008 3.988 1.753 0.508 1.346 0.2 0.2 6.198 1.270 0.386 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 0.394 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
16–Lead SOP Plastic Package
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei CityHsinchu, Taiwan, R.O.C.
Tel: (8863)55267 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
8F, No. 137, Lane 235, Paochiao Road, Hsintien CityTaipei County, Taiwan, R.O.C.
Tel: (8862)191466 Fax: (8862)191465Email: marketing@richtek.com
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